Silicon Validation Engineer
Posted 3 Sep 2026
Advertised as “Silicon Validation Engineer, Software”
BranchFactor Summary
The original posting with the fluff stripped out
- Expected experience
- 2+ yrs
- Management level
- Individual contributor
- Employment
- On-Site
- Contract
- Full-time
No salary listed for this role.
Field of studyComputer Engineering, Computer Science, Electrical Engineering (or related)
Study levelBachelor's or higher
About Etched
Etched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.
Job Summary
We are seeking a skilled and motivated Silicon Validation Firmware Engineer to develop the firmware and low-level software that validates our AI/ML accelerator ASICs across their entire Lifecycle, from pre-silicon emulation and FPGA prototyping through post-silicon bring-up, characterization, and production ramp. In this role you will build the validation firmware, test content, and automation that prove our silicon works, and you will be hands-on debugging real hardware in the lab. Your work directly enables functional correctness, performance, and reliability of our cutting-edge products.
Key Responsibilities
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Develop and own low-level validation firmware in C/C++ that runs across emulation and physical silicon, providing test content pre-silicon and reusing it to drive post-silicon bring-up.
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Drive early bring-up of first silicon: boot, initialization, feature enablement, and debug of ASICs.
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Perform deep-dive debug of silicon issues spanning firmware, RTL, electrical, protocol, and system levels; root-cause and resolve failures.
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Build firmware infrastructure including hardware abstraction layers (HALs) and low-level device drivers for compute units, memory subsystems, and high-speed interfaces.
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Develop and extend validation automation, result-capture, and regression frameworks (CI/CD) to run validation at scale.
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Author firmware-driven test plans and define coverage metrics across IP blocks and subsystems; execute functional, performance, and stress/corner-case testing.
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Validate and characterize custom IP blocks and accelerator components on both pre- and post-silicon platforms.
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Use debug consoles and lab tooling (JTAG, UART, logic/protocol analyzers) for silicon debug and characterization.
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Collaborate closely with design, verification, architecture, DFT, and driver teams to ensure a smooth transition from pre-silicon verification to post-silicon validation, and to feed silicon issues back into revisions and firmware/driver workarounds.