Digital IC Design Engineer
Posted 15 Sep 2026
Advertised as “Mixed-signal IC Design Engineer”
BranchFactor Summary
The original posting with the fluff stripped out
- Management level
- Individual contributor
- Employment
- On-Site
- Contract
- Full-time
No salary listed for this role.
Meet Arago and the Aragonians
Arago is an AI and computer hardware company whose mission is to drive the course of history forward. We do so by accelerating breakthroughs at the intersection of AI and semiconductors.
Founded in 2024 by AI researchers and physicists with deep expertise in photonics, electronics, software, mathematics, and machine learning, Arago brings together a lean team of engineers and scientists from the world’s top companies and research labs.
Composed of nine nationalities and operating from hubs in France, North America, and Israel, we believe in great science and fast achievements. Our work is guided by these core principles:
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Do great things: we deliver work we’re proud to sign our name to.
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High velocity: speed matters. We move quickly, one step at a time.
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One unit: we’re all in this together, with relationships grounded in trust, respect, and camaraderie.
Arago is backed by executives from Apple, Arm, Nvidia, Microsoft, and Hugging Face, as well as prominent US and European deeptech venture firms and exited founders.
What you’ll do
Design, integrate, and deliver high-performance digital subsystems within mixed-signal ICs, enabling control, calibration, and high-speed data movement in analog-centric environments — owning the flow from RTL to physical implementation and tape-out.
Responsibilities
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Design and verify digital subsystems that interface directly with high-speed analog and mixed-signal circuits — including calibration engines, control FSMs, data converters, and multiplexing logic.
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Contribute to the design of analog components at the digital-analog interface: calibration circuits, DACs/ADCs, comparators, and others.
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Integrate and customize external IP blocks (e.g., GPIOs, LVDS I/Os, serial interfaces), ensuring compliance with analog signal and timing requirements.
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Lead the digital implementation flow for mixed-signal blocks: from RTL to synthesis, floorplanning, P&R, timing closure, physical signoff, and tape-out.
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Collaborate closely with analog, layout, and system teams to co-optimize digital-analog boundaries, resolve cross-domain issues, and ensure robust high-speed performance.
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Contribute to the development of high-speed serial I/O subsystems — experience in the design and implementation of SerDes blocks is a significant advantage.
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Language: English at a proficient level. French is a plus.