Member of Technical Staff
Posted 11 Aug 2026
Advertised as “Member of Technical Staff, ASIC Verification”
BranchFactor Summary
The original posting with the fluff stripped out
- Expected experience
- 5+ yrs
- Management level
- Individual contributor
- Employment
- On-Site
- Contract
- Full-time
- Visa sponsorship
- Offered
No salary listed for this role.
Field of studyComputer Engineering, Electrical Engineering (or related)
Study levelBachelor's or higher
Field of studyComputer Engineering, Electrical Engineering (or related)
Study levelDoctorate
About the Role
We are seeking a Member of Technical Staff, Senior ASIC Verification Engineers.
This role demands proven technical leadership in ASIC verification and simulation methodologies. You will propose and setup the optimum verification methodology. You will be part of an early-stage startup working on an exciting product in the Artificial Intelligence/DataCenter space. The work involves learning advanced LLM in modern data centers and applications to design memory acceleration.
This role will be performed onsite from one of our offices in Santa Clara, CA or Boston, MA.
Essential Duties & Responsibilities
As part of the Verification team, you will be responsible for verification of Netpreme silicon, IP and subsystems.
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Provide technical leadership in defining IP/SOC verification from microarchitecture to design to tapeout. Conduct design reviews to ensure adherence to best practices.
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Guide the team in optimizing the design to meet aggressive performance, power and area goals.
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Drive effective and seamless collaboration with partner teams across architecture, design, physical design, firmware, DFT, and post silicon domains to ensure successful system level functionality.
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Interface with external IP vendors, foundries and EDA tool providers to ensure dependencies and roadblocks are addressed in a timely fashion to support team deliverables.
Qualifications
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Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or a related field.
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Minimum of 5+ years of ASIC/SOC verification experience.
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Excellent leadership, communication and stakeholder management skills.
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Ability to coordinate across multiple projects, manage risks and escalations, and work under tight schedules and budget constraints.
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Strong knowledge across the full ASIC/SOC development cycle from microarchitecture development to tape-out in advanced process technologies.
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Outstanding technical expertise in verification methodologies.
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Hands-on design experience in one or more industry standards/protocol stacks such as Ethernet, UCIe, UALink etc.
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Demonstrated ability to optimize designs for PPA (power, performance, area) and to integrate major subsystems (interconnect, I/O, memory).
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Proficiency with front-end development tools/methodologies, and scripting for automation and flow integration.