About Alta Ares

Alta Ares is an air defense Neoprime. We build AI-guided interceptors to counter drones and cruise missiles, along with the software platform that powers them.

Our customers are NATO-aligned militaries and defense institutions, and our systems are regularly deployed during live exercises and operational demonstrations across Europe, the Middle East, and Asia.

Founded in 2024, we have grown to 90 people, raised over $60M, and increased revenue 40× this year. We are now entering a new phase of international expansion, industrial scaling, fundraising, and product development.

Role & Mission

• Own the development of FPGA functions for our electronic warfare and signals intelligence capabilities, from initial architecture to validation on operational hardware.

• Work with systems and algorithm engineers to define processing requirements and assess implementation feasibility.

• Build RTL modules in VHDL or SystemVerilog to process digitized RF signals, extract relevant information, and generate waveforms.

• Adapt and validate DSP algorithms for FPGA implementation, balancing numerical accuracy, processing speed, and hardware resources.

• Integrate acquisition and processing chains, including digital down-conversion, filtering, channelization, FFT, detection, direction-finding, and classification.

• Establish verification methods and testbenches to check functional behavior and performance throughout development.

• Connect programmable logic to RF converters and embedded processors, defining data transfers, control interfaces, clocking, and synchronization.

• Resolve implementation constraints, achieve timing closure, and optimize resource utilization and power consumption.

• Bring up FPGA designs on target boards, investigate integration issues, and correlate measured behavior with simulation results.

• Contribute to laboratory and field testing alongside RF, software, and systems engineers.

• Maintain clear design records, interface specifications, and validation evidence.

• Improve reusable FPGA components and development practices as the product portfolio grows.

Candidate Profile

• MSc in Electrical Engineering, Electronics Engineering, Signal Processing, or a related field.

• Strong experience developing and verifying RTL in VHDL or SystemVerilog, with a focus on digital signal processing.