FPGA Design Engineer

Job Description
BAE Systems is seeking a Senior Principal FPGA Design Engineer!

See what you’re missing. Our employees work on the world’s most advanced electronics – from detecting threats for F-35 pilots to illuminating the night for soldiers. Spanning air, land, sea, and space, we are developing the technology of tomorrow, delivered today. We’re innovating for the future, and you can too. Our flexible work environment provides you a chance to change the world without giving up your personal life. We put our customers first – exemplified by our mission: “We Protect Those Who Protect Us®.” Sound like a team you want to be a part of? Come build your career with BAE Systems.

At BAE Systems, we deliver a full range of products and services for air, land and naval forces, as well as advanced electronics, security, information technology solutions and customer support services. If you are an individual that enjoys a cohesive team environment and is interested in a variety of challenges across a variety of products, then we are interested in hearing from you!

Electronic Combat Solutions Hardware Engineering Group is looking for a Senior Principal FPGA Design Engineer to support FPGA designs through all phases of development. The ideal candidate is expected to perform activities including assisting in requirements generation and design architecture, ownership of RTL coding, synthesis, place and route, timing closure, basic test bench development, lab testing and debug, and product support.

Because of the need for consistent, in-person collaboration and/or the requirement to perform all work onsite due to the nature of this particular role, it will be performed full-time on site.
**Please note that pursuant to a government contract, along with the ability to obtain a minimum of Secret Clearance**
#ESFPGA

Required Education, Experience, & Skills
•8+ years of relevant experience with bachelor's degree (less years with advanced degree)
•Current Security Clearance (Secret), or eligible to obtain one
•Significant experience in FPGA (preferred) or ASIC Design / Development
•VHDL (preferred) or Verilog HDL coding
•Familiarity with Xilinx Vivado or Intel/Altera Quartus
•Digital simulation using Modelsim/Questa
•Significant experience with static timing analysis and clock domain crossing techniques
•Experience with high speed interfaces like SERDES, PCIe, DDR2/3/4, LVDS
•Familiarity with revision control (GIT, CVS, Clearcase, Subversion, etc.)
•Some Experience generating scripts (Perl, Tcl, Python, shell, etc.)
•Strong debug and problem solving skills
•Strong written and oral communication skills •Self-starter and a good team player •Ability to mentor and willingness to be mentored