Silicon Product Engineer

Waymo is an autonomous driving technology company with the mission to be the world's most trusted driver. Since its start as the Google Self-Driving Car Project in 2009, Waymo has focused on building the Waymo Driver—The World's Most Experienced Driver™—to improve access to mobility while saving thousands of lives now lost to traffic crashes. The Waymo Driver powers Waymo’s fully autonomous ride-hail service and can also be applied to a range of vehicle platforms and product use cases. The Waymo Driver has provided over ten million rider-only trips, enabled by its experience autonomously driving over 100 million miles on public roads and tens of billions in simulation across 15+ U.S. states.

Waymo's Compute Team is tasked with a critical and exciting mission: We deliver the compute platform responsible for running the fully autonomous vehicle’s software stack. To achieve our mission, we architect and create high-performance custom silicon; we develop system-level compute architectures that push the boundaries of performance, power, and latency; and we collaborate closely with many other teammates to ensure we design and optimize hardware and software for maximum performance. We are a multidisciplinary team seeking curious and talented teammates to work on one of the world’s highest performance automotive compute platforms.

This role follows a hybrid work schedule and reports to the Director, Silicon. 

You will:

• Lead Custom Silicon Productization: Drive advanced ASICs and domain-specific architectures (TPU, ISP, AI/ML compute) for the Waymo Driver from first-silicon bring-up through characterization and high-volume production ramp.

• Define System-Level Test (SLT) Content & Hardware Strategy: Develop targeted test workloads, stress conditions, and pass/fail criteria and the define and architect the production screening hardware to rigorously screen marginal silicon and system interactions.

• Lead RMA & Field Failure Investigations: Drive comprehensive root-cause analysis for field returns and RMAs by correlating failure signatures with system telemetry, manufacturing history, and lab data to continuously improve ASIC reliability and close screening and validation gaps.

• Execute Hands-On Debug & Production Readiness: Perform hands-on silicon debug using lab equipment, system logs, firmware/software traces, and schematics to develop product operating limits, guard bands, binning strategies, and screening criteria based on characterization results.

• Optimize Yield & Product Health: Develop large-scale data mining and statistical analysis to identify failure signatures and yield limiters, translating hardware insights into actionable design feedback and scalable screening improvements.