PCIe Hardware System Engineer
Posted 23 Jun 2026
Advertised as “Senior PCIe Hardware System Engineer”
BranchFactor Summary
The original posting with the fluff stripped out
- Expected experience
- 7+ yrs
- Management level
- People management
- Employment
- On-Site
No salary listed for this role.
Everpure (NYSE: P) has evolved from storage pioneer to data platform, closing fiscal 2026 with $3.7 billion in revenue, its first billion-dollar quarter, and accelerating growth into FY27. Our strategic agenda spans the companies defining the next era of technology - hyperscalers, AI labs, the AI hardware supply chain, data platform providers, and the broader AI ecosystem.
This type of work—work that changes the world—is what the tech industry was founded on. So, if you're ready to seize the endless opportunities and leave your mark, come join us.
THE ROLE
As a Senior PCIe Hardware System Engineer, you will spearhead the technical success and reliability of our next-generation data storage solutions within the region. Operating at the intersection of cutting-edge hardware and firmware, you will lead high-impact issue resolution and product validation to ensure our systems maintain their industry-leading performance and energy efficiency. In this pivotal role, you will serve as the primary on-the-ground technical anchor, collaborating directly with Taiwan-based JDM/ODM partners, SSD suppliers, and enterprise customers to turn complex technical challenges into seamless product deployments.
WHAT YOU'LL DO
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Drive Technical Resolution: Own and lead the end-to-end triage, failure analysis, and root cause investigation for complex PCIe Gen5/Gen6 and NVMe system-level issues, ensuring rapid resolution for manufacturing, vendors, and customers.
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Forge Strategic Partner Collaborations: Act as the primary on-site technical interface at vendor and customer facilities across Taiwan, driving alignment and solving high-escalation interface challenges with key SSD suppliers and flash-controller partners.
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Architect Validation Frameworks: Guide the development and execution of robust PCIe, NVMe, and SMBus validation test plans for early-phase chip bring-up and continuous regression testing across the entire development lifecycle.
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Innovate with Automation: Leverage Python scripting and modern AI/automation tools to optimize issue-triaging workflows and enhance hardware validation efficiency.
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Champion Local Technical Leadership: Provide self-directed engineering ownership across time zones, mitigating risks before they escalate, while mentoring junior engineers as our local hardware presence expands.
WHAT YOU BRING
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7+ years of experience in advanced interface debugging, root cause analysis, and solution development across complex system-level interactions involving host, PCIe, and CXL interfaces in enterprise server and SSD environments. Experience developing and automating comprehensive validation and test solutions is preferred.