HPC Developer
US$150,000 – US$230,000 / yr base salary
Posted 6 Oct 2026
Advertised as “Senior HPC Developer - RDMA Networking ”
BranchFactor Summary
The original posting with the fluff stripped out
- Expected experience
- 5+ yrs
- Management level
- Individual contributor
- Employment
- On-Site
| Base salary | US$150,000 – US$230,000 / yr |
|---|
About Clockwork Systems
Clockwork.io – Software Driven Fabrics to increase GPU cluster utilization
Clockwork Systems was founded by Stanford researchers and veteran systems engineers who share a vision for redefining the foundations of distributed computing. As AI workloads grow increasingly complex, traditional infrastructure struggles to meet the demands of performance, reliability, and precise coordination. Clockwork is pioneering a software-driven approach to AI fabrics by delivering cross-stack observability to catch and quickly resolve problems, workload fault tolerance to keep jobs running through failures, and performance acceleration that dynamically routes and paces traffic to avoid congestion.
To learn more, visit www.clockwork.io.
About the Role
We’re looking for a Senior Systems Engineer – RDMA Networking & Storage to help build and optimize high-performance infrastructure for AI and HPC systems.
You’ll work across RDMA networking and storage data paths, spanning compute hosts, NICs, DPUs, smart switches, storage systems, and the Linux software stack. The work includes RoCE networking, NVMe-over-Fabrics, congestion control, performance optimization, programmable network hardware, and debugging complex interactions across hardware and software.
This role is ideal for an experienced systems engineer who enjoys working close to the hardware, diagnosing difficult performance problems, and building reliable systems where latency, throughput, and network behavior matter.
What You’ll Do
- Design, build, and optimize high-performance RDMA networking and storage systems
- Work with RoCE, RDMA Verbs, and NVMe-over-Fabrics
- Develop systems that leverage DPUs, SmartNICs, and programmable switches for packet processing, telemetry, control, and data-path acceleration
- Develop and optimize software using queue pairs, completion queues, memory registration, zero-copy I/O, and other RDMA primitives
- Debug performance and reliability issues across applications, Linux kernel, drivers, NICs, DPUs, switches, and storage systems
- Analyze network and storage behavior including latency, throughput, queueing, congestion, packet loss, retransmissions, and flow control
- Develop mechanisms to improve network performance and congestion behavior in high-bandwidth RDMA fabrics