System Software Engineer

System Software Engineer, Networking

About Tensordyne

AI is reshaping our world, taking on cognitive work that once belonged only to humans — perceiving across modalities and environments, learning quickly, and solving hard problems. Tensordyne is an AI systems company building very high-performance, low-power generative AI inference platforms. Through custom silicon, hardware, and software, our mission is to accelerate multimodal generative AI inference at scale with safe, sustainable, high-performance systems for our hyperscaler and neocloud data center customers.

We are a well-funded, fast-paced startup with headquarters in Sunnyvale, CA and Munich, Germany, plus talented team members working remotely across North America and Europe. We take care of our people and their families with comprehensive benefits, competitive compensation, flexible spending options, and recognition programs — because category-defining technology starts with a healthy, supported team. Come help us shape the future of multimodal generative AI.

About the Role

We are looking for a Networking Engineer to design, build, and optimize the multi-hop fabrics that connect Tensordyne's AI inference systems at rack, pod, and cluster scale. This is a deeply technical, hands-on role for someone who is at home moving up and down the stack — tuning userspace services, patching kernel drivers, and reaching into firmware — to squeeze latency, bandwidth, and reliability out of large, lossless networks.

You will own networking problems end-to-end: from topology and fabric architecture through control-plane behavior, data-plane programming, and the hardware and firmware that sit underneath. The ideal candidate treats "the network" as one continuous system spanning application, operating system, ASIC, and optics, and is energized by chasing a single packet path across all of those boundaries.

This role is based on-site at our Sunnyvale, CA headquarters.

What You'll Do

• Architect ultra-high-bandwidth, non-blocking multi-hop scale-out fabrics (Clos spine–leaf and super-spine style topologies) for large-scale distributed AI inference, and define redundancy, oversubscription, and performance targets.
• Optimize lossless Ethernet and RDMA/RoCE transport using congestion-control mechanisms such as PFC, ECN, and DCQCN, including buffer and QoS tuning tied to real workload behavior.
• Work across the full stack — userspace control-plane services, the Linux kernel and network device drivers, switch ASIC SDK/SAI layers, and platform firmware — to diagnose and remove bottlenecks wherever they live.
• Drive route, neighbor, next-hop, and ECMP programming flows from control-plane intent all the way to confirmed ASIC hardware state, and build mechanisms that distinguish control-plane acceptance from SDK acceptance from hardware programming acknowledgement.