Senior Software Architect
US$224,000 – US$431,500 / yr base salary
Posted 9 Sep 2026
Advertised as “Senior Software Architect - Deep Learning and HPC Communications”
BranchFactor Summary
The original posting with the fluff stripped out
- Expected experience
- 12+ yrs
- Management level
- Individual contributor
- Contract
- Full-time
| Base salary | US$224,000 – US$431,500 / yr |
|---|
Field of studyComputer Engineering, Computer Science, Parallel Programming (or related)
Study levelMaster's or higher
NVIDIA is leading groundbreaking developments in Artificial Intelligence, High Performance Computing and Visualization. The GPU -- our invention -- serves as the visual cortex of modern computers and is at the heart of our products and services. Our work opens up new universes to explore, enables groundbreaking creativity and discovery, and powers inventions that were once considered science fiction, including artificial intelligence to autonomous cars. We are the GPU Communications Libraries and Networking team at NVIDIA. We build communication libraries like NCCL, NVSHMEM, and UCX that are crucial for scaling Deep Learning and HPC. We're seeking a Senior Software Architect to help co-design next-gen data center platforms and scalable communications software.
DL and HPC applications have a huge compute demands and already run at scales of up to tens of thousands of GPUs. GPUs are connected with high-speed interconnects (e.g. NVLink, PCIe) within a node and with high-speed networking (e.g. InfiniBand, Ethernet) across nodes. Efficient and fast communication between GPUs directly impacts end-to-end application performance. This impact continues to grow with the increasing scale of next generation systems. This is an outstanding opportunity to advance the state-of-the-art, break performance barriers, and deliver platforms the world has never seen before. Are you ready to build the new and innovative technologies that will help realize NVIDIA's vision?
What you will be doing:
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Investigate opportunities to improve communication performance by identifying bottlenecks in today's systems.
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Design and implement new communication technologies to accelerate AI and HPC workloads.
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Explore innovative solutions in HW and SW for our next generation platforms as part of co-design efforts involving GPU, Networking, and SW architects.
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Build proofs-of-concept, conduct experiments, and perform quantitive modeling to evaluate and drive new innovations.
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Use simulation to explore performance of large GPU clusters (think scales of 100s of 1000s of GPUs)
What we need to see:
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M.S./Ph.D. degree in CS/CE or equivalent experience.
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12+ years of relevant experience.
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Excellent C/C++ programming and debugging skills.
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Experience with parallel programming models (MPI, SHMEM) and at least one communication runtime (MPI, NCCL, NVSHMEM, OpenSHMEM, UCX, UCC).
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Deep understanding of operating systems, computer and system architecture.