FPGA Prototyping Engineer

K2 is building the largest and highest-power satellites ever flown, unlocking performance levels previously out of reach across every orbit. Backed by over $1 billion in total funding from leading investors including Altimeter Capital, ICONIQ, Kleiner Perkins, Lightspeed Venture Partners, Redpoint Ventures, and T. Rowe Price — and with over $1 billion in signed contracts across commercial and US government customers, we're mass-producing the highest-power satellite platforms ever built for missions from LEO to deep space.

The rise of heavy-lift launch vehicles is shifting the industry from an era of mass constraint to one of mass abundance, and we believe this new era demands a fundamentally different class of spacecraft. Engineered to survive the harshest radiation environments and to fully capitalize on today's and tomorrow's massive rockets, K2 satellites deliver unmatched capability at constellation scale and across multiple orbits.

With multiple launches in 2027 and plans to scale to 100 satellites a year, we're Building Bigger — helping develop the solar system and build toward a Kardashev Type II (K2) civilization. If you are a motivated individual who thrives in a fast-paced environment and you're excited about contributing to the success of a high-growth Series D-funded company, we'd love for you to apply.

The Role

We are seeking a Senior FPGA & Silicon Bring-up Engineer to accelerate the development of next-generation communications ASICs. You will own FPGA prototyping, firmware enablement, first-silicon bring-up, and hardware validation, serving as the bridge between ASIC design, firmware, software, and system integration. This role spans the entire silicon lifecycle from pre-silicon FPGA platforms that enable early hardware/software integration to post-silicon debug, interface validation, and automated test infrastructure.

Responsibilities

• Develop FPGA-based prototypes to enable early ASIC integration, firmware development, and system validation.
• Build hardware platforms that allow software and firmware teams to develop before first silicon.
• Support first-silicon bring-up, debug, and functional validation.
• Develop automated validation infrastructure for silicon characterization and regression testing.
• Configure and validate digital interfaces including high-speed Ethernet SerDes, SPI, UART, GPIO, and other peripheral interfaces.
• Develop FPGA-based traffic generators, protocol checkers, and test applications for interface validation.
• Debug issues spanning RTL, firmware, software, FPGA prototypes, and silicon using simulation and laboratory instrumentation.
• Collaborate closely with ASIC Design, Verification, Firmware, Software, Systems, and DFT teams to accelerate product development.

Qualifications

• BS or MS in Electrical Engineering, Computer Engineering, or related field.