3D Stacked DRAM Design Engineer

About SK hynix America:

At SK hynix America, we are at the forefront of semiconductor innovation. As a global leader in HBM, DRAM, and NAND flash technologies, we develop the advanced memory solutions powering everything from advanced mobile technology to massive AI data centers. With major investments in the U.S. and a leading position in the global AI revolution, we build the critical infrastructure of the digital landscape and remain committed to sustainable operations. We invite innovative minds to be part of our journey. Here, you will be part of a collaborative team pioneering the next generation of memory technologies, expanding our market footprint, and defining the future of computing.

Work Model: Onsite

Job Title: 3D Stacked DRAM Design Engineer
Office Location: San Jose, CA
Job Type: Full-Time
Work Model: Onsite 

Job Summary:

To strengthen leadership in the DRAM-on-Logic era through optimized DRAM die design, we are seeking talent capable of driving the co-design of 3D-stacked DRAM logic dies in close collaboration with U.S.-based customers. This strategic hiring initiative aims to enhance our global competitiveness by fostering deep engagement with key American clients, ensuring that our die design solutions are precisely aligned with their evolving technical requirements and market demands.

Responsibilities:

• Strengthen leadership in the DRAM-on-Logic era through optimized DRAM Die design and technical innovation.
• Co-design 3D-stacked DRAM Logic Dies and next-generation DRAM-on-Logic solutions with U.S.-based customers.
• Design circuits for 3D-stacked DRAM that meet internal and external specifications, including DRAM DFT implementation.
• Review specifications and define the architecture for 3D-stacked DRAM products.
• Improve design quality and yield throughout the 3D-stacked DRAM development phase.
• Enhance performance and ensure stable operation to meet strict customer requirements during product development.
• Establish close technical engagement with key U.S.-based customers to address immediate 3D-stacked DRAM challenges.
• Drive market competitiveness and service differentiation through sustained customer collaboration and technical leadership.

Qualifications:   

• Bachelor’s degree or higher in Electrical Engineering or a related discipline with 4+ years of relevant experience.